Enclosure for electronic circuitry



FIG. 1 is a front isometric view of the present invention;

FIG. 2 is a front view of the present invention;

FIG. 3 is a left side view of the present invention;

FIG. 4 is a right view of the present invention;

FIG. 5 is a rear view of the present invention;

FIG. 6 is a bottom view of the present invention; and,

FIG. 7 is a rear isometric view of the present invention. 

The ornamental design for an enclosure for electronic circuitry, as shown and described. 